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@Tzk @digitalbath @WMDK since it's about AMD, I'll post here. This is one of the good sources about microcode update disassembling and modification.
https://files.samantaz.fr/useful_knowledge/studies/usenix/sec17-koppe.pdf
It explains CPU microcode ROM, microcode update structure and what...
I've written an article about all those blanks in the Athlon 64 we had so far. Enjoy it if you like the AMD K8 architecture.
https://docs.google.com/document/d/1el2MxtWsXVTsgcw0ql7OWZZO0akG1Dm0qUaHWqo4x2U/
Yes, XP has microcode update too. So you want to disable it so it doesn't interfere with the tests. You could try this method (7.2). I've used registry to disable it. Let me know if the device manager method won't work, I'll look for the registry.
Thank you for the input about solder/paste...
In fact, it is like assembler, bytecode. At least for AMD there were studies that reverse-engineered microcode updates. I'll give a link if I find it in my notes.
Very unlikely. I don't think microcodes are related to FSB.
Sometimes yes, some undocumented MSR control various features (think...
I'd suggest to try relax subtimings first of all tRC and tRFC, should give a nice improvement on 512Mbit chips. Very impressive results though.
Would be interesting to know their voltage scaling too.
Another small thing about PAT:
PAT is not a single technology. In fact it's two settings that work similar:
1) Fast CS# (it's present in all P4 chipsets starting from 845). Gigabyte boards have it as a separate setting with Advanced (ctrl+F1) menu.
2) Faster ADS# strobe (this one is new).
I've...
It's a very gray area and always was. Some 3DMark and many PCMark alterations were obvious cheats like repacking texture archives, changing benchmark DLLs and so on. But some fall within the "general tweak" when a certain technique doesn't speed up only the benchmark but the system as a whole...
BSEL mod?
Not this option disables PCI clk from clockgen if the PCI slot is not populated. Same menu with RAM on old boards. Was called "disabled unused PCI/DIMM clocks" or like that.
I think they might be just fake. Compare the letters for capacitor places (C52, C23, C15) with letters on the chips (Qimonda). They are barely readable. I have similar BGA sticks, Qimonda BF-5 with Kingston KVR logo. I will post photos in the evening for comparison.
One approach would be to understand what steps are required to change FID. The BKDG for K8 could help, seems like they work the same way as K7. http://ftp.jp.freebsd.org/pub/NetBSD/misc/cegger/hw_manuals/amd/bkdg_k8_pub_26094.pdf
After all, bus disconnect is enabled using special cycle and NF2...
Like P-states?
I think this one means nothing more than that the PowerNow! driver sets MSR for new VID/FID like CPUMSR/CrystalCPUID/RMClock.
Some more on the Powernow! case (Russian) - https://overclockers.ru/blog/xKVtor/show/903/Privivaem_PowerNow_desktopnym_materinskim_platam
The guy emulated...
The only info I've found is this one: https://www.overclock.net/threads/official-socket-939-opteron-most-overclockable-stepping-averages-info.128767/
probably you've seen it.
Do you have a description of how to decipher stepping codes (what they mean)? And the part after the date too. I've seen only one source so far.
Also I've made a modBIOS for AsRock K8A780LM for benching purposes.