RopBench v1.71

This tool shows the peak frequency reached by a progressively increasing set of Zen 3/4 cores, up to the maximum number of physical cores.
It is useful to gain some better understanding of the behavior of the cpu cores when varying certain bios settings.
It retrieves its data from the cpu msr values using the WinRing0 signed driver ( https://github.com/Merlin1st/WinRing0 ) and the inpoutx64.dll
already included in this archive .

To read and write the cpu hardware settings, this tool needs to run as Administrator.

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A brief usage description of the tool can be displayed by running:
ropbench.exe -h -nogui

For example it may show:
    RopBench v1.54
    Zen 3 - Family:19h  Model:21h  Stepping:02h
    Logical processors: 32
    Threads per core: 2
    CPPC order: 0,1,3,4,7,2,5,6,15,8,14,12,13,9,11,10
    Usage of D:\ropbench\ropbench.exe:
      -debugsmu
            If set, displays all the SMU commands sent, with the first passed argument and the first received result
      -eff_freq
            If set, calculate effective freq instead of peak freq
      -gui
            If set, displays the gui
      -monitor_time int
            Monitoring time in seconds (2 - 30 seconds) (default 2)
      -one_at_a_time
            If set, monitors one core at a time instead of a progressively larger set of cores
      -sampled_core int
            Samples a single core with the given id and outputs the first 600 freq sampled at 1/20th of ms (default -1)
      -samples_output_file string
            The name of the file where to put the frequency readings retrieved by the -sample_core option

The monitoring time is the period of time that the load on a set of cores will be kept running while monitoring the peak clock frequency
that has been reached.
It can go from 2 to 30 seconds. Lower periods will run the tool faster but may lead to less precise readings.

These options are used like in the following sample execution:
  F:\>ropbench.exe -monitor_time=10 -nogui
  RopBench v1.54
  Zen 3 - Family:19h  Model:21h  Stepping:02h
  Logical processors: 32
  Threads per core: 2
  CPPC order: 0,1,3,4,7,2,5,6,15,8,14,12,13,9,11,10
  Sample time: 10 seconds
  Sampling...
  01 core  peak frequency is 5099mhz
  02 cores peak frequency is 5098mhz
  03 cores peak frequency is 5096mhz
  04 cores peak frequency is 5089mhz
  05 cores peak frequency is 5066mhz
  06 cores peak frequency is 5022mhz
  07 cores peak frequency is 4998mhz
  ...

  Execution completed.
  Press 'Enter' to exit...

If there are other background applications or tasks running at the same time, the results may be slightly skewed.
The load placed on the cores during monitoring is very light and uses standard floating point operations only.

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In version v1.1 the following two options have been added:
  -sampled_core int
        Sample a single core with the given id and outputs the first 600 freq readings at 1/20th of ms (default -1)
  -samples_output_file string
        The name of the file where to put the frequency readings retrieved by the -sample_core option

These options generate a file with the first 30ms of the frequency change of a core sampled at a rate of 1/20th of a millisecond.

For example to sample the ramp-up of the core 11:
  F:\>ropbench.exe -sampled_core=11 -samples_output_file=output.csv -nogui
  RopBench v1.54
  Zen 3 - Family:19h  Model:21h  Stepping:02h
  Logical processors: 32
  Threads per core: 2
  CPPC order: 0,1,3,4,7,2,5,6,15,8,14,12,13,9,11,10
  Sample time: 2 seconds
  Sampling...
  Sampling core 11...
  Core 11 sampled frequency is 5083mhz
  Sampled values saved in file output.csv

  Execution completed.
  Press 'Enter' to exit...

The resulting file can then be used for example in Excel to display a chart of the behaviour of the selected core under load, or to
verify how a change in the PBO settings, or different thermal solutions, or different BIOSs versions, may impact the frequency ramp-up.

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In version v1.3 the following option has been added:
  -one_at_a_time
        If set, monitors one core at a time instead of a progressively larger set of cores

This option allows to sample each core in isolation and displays its peak frequency.

For example to get the list of peak frequencies for all the available cores:
    F:\>ropbench.exe -one_at_a_time -nogui
    RopBench v1.54
    Zen 3 - Family:19h  Model:21h  Stepping:02h
    Logical processors: 32
    Threads per core: 2
    CPPC order: 0,1,3,4,7,2,5,6,15,8,14,12,13,9,11,10
    Sample time: 2 seconds
    Sampling...
    Core ID 00 peak frequency is 5099mhz
    Core ID 01 peak frequency is 5098mhz
    Core ID 02 peak frequency is 5085mhz
    Core ID 03 peak frequency is 5098mhz
    Core ID 04 peak frequency is 5099mhz
    Core ID 05 peak frequency is 5082mhz
    Core ID 06 peak frequency is 5069mhz
    Core ID 07 peak frequency is 5074mhz
    Core ID 08 peak frequency is 5039mhz
    ...

    Execution completed.
    Press 'Enter' to exit...

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In version v1.5 the following option has been added:
  -gui
        If set, displays the gui

This option starts the RopBench tool with a user interface where it is possible to change some common hardware parameters, without the need to reset to
the BIOS, and then perform some cpu sampling that will update the displayed charts. Any settings change will be reverted with a normal reboot.

Please be aware that some of the offered settings are quite keen to reboot your PC automatically if they are wrongly set. For example, if you change
all the PBO Offsets to -30 using RopBench, and your cpu sample can't sustain that configuration, you will get a very undfriendly sudden reboot pretty
soon.

Note that the "Boost" field in the tool is limited by the BIOS setting with the same name. So, if in the BIOS you have set a Boost of 50MHz on a 5950X,
the "Boost" field in RopBench will show "5100" (that is, 5050MHz default boost clock plus 50MHz additional boost). The tool will then allow to set that
value to 5100MHz or lower than 5100MHz. For example, if you have 50MHz as boost limit configured in your BIOS, and try to set it to 5150 using the RopBench
tool, that change will silently fail and keep it set to 5100.

The tool should support Zen 2/3/4 cpus, but on Zen 2 there is no support for changing the PBO Curve Offsets, and on Zen 4 there is no support for changing
the boost limit. Also, I don't have a Zen 2 or Zen 4, so there may be other issues that I am not aware of.

Any unexpected error, and the results of the sampling tests, will be also displayed in the command prompt used to start the RopBench tool.

PLEASE NOTE!!!: Changing the power limits may damage your cpu or motherboard! I am not responsible for any damage that you may cause to your cpu by using the
RopBench tool, to change any setting above the technical specifications of your cpu and motherboard or for any other reason. If you don't know what those
settings are, most probably you should not use this tool.

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In version v1.53 the following option has been added:
  -debugsmu
        If set, displays all the SMU commands sent, with the first passed argument and the first received result

This option is meaningful only when associated with the -gui option, in which case all the smu commands sent to write or read the PPT/TDC/EDC/CO/Boost values
will be printed on screen. Additionally, when this flag is set, the tool will try to avoid waiting more than 50ms for the target SMU mailbox to be available.
This is intended to be useful for debugging particular input values that may lock the smu commands.

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From version v1.62 this tool now starts in GUI mode by default. It is still possible to run the command line version by using the -nogui command line option.

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ChangeLog:
    - v1.71
        Fixed an issue when cores are not a multiple of 8 (7600X, 7900X...)

    - v1.70
        Added core-to-core cache latency calculation
        Show Windows product name at start
        Fixed a UI scaling issue at higher resolutions
        Fixed an issue when retrieving PBO configuration with less than 16 cores

    - v1.69
        Fixed a bug when setting Scalar on Zen 4
        Improved RAM&Cache latency stability
        Fixed a possible issue with large memory pages
        Made the application single instance
        Reduced RAM bandwidth to allow fair comparison between cores
        Retrieve CPPC order from MSRs

    - v1.67 BETA
        Fixed a bug on L3 latency calculation
        Added RAM read/write bandwidth
        Added Uncached RAM latency (this is the latency of completely uncached ram)
        Switched to using large memory pages only

    - v1.66 BETA
        Fixed bug on TSC when BCLK != 100
        Reestablished the Zen 3 sampling code path
        Small UI tweaks
        Log all the applied changes to external console

    - v1.64 BETA
        Bug fixing

    - v1.62 BETA
        Better support for Zen 4
        Some UI changes
        Cache Latency test
        Defaults on the GUI version

    - v1.54
        Added some UI wdgets

    - v1.53
        Added new option -debugsmu to print all smu commands with first arg and result

    - v1.52
        Allows changing the Boost Limit (FMAX) on Zen 4
        Thanks to @Veii/@1rusanovBG~zentimings for providing the command ids.

    - v1.51
        Made two buttons to set limits and test&chart

    - v1.5:
        Added the new option -gui to display a user interface

    - v1.41:
        Got rid of an unneeded dll dependency

    - v1.4:
        Retrieve the cpu data from the model-specific registers through the WinRing0 driver

    - v1.3:
        Add support for sampling the peak frequency of each core in isolation

    - v1.2:
        Remove the additional compression on the .exe file

    - v1.1:
        Add support for sampling the core ramp-up behaviour

    - v1.0:
        First version

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DISCLAIMER:
THIS SOFTWARE AND THE ACCOMPANYING FILES ARE PROVIDED "AS IS." THE
AUTHOR AND ITS SUPPLIERS DO NOT AND CANNOT WARRANT THE PERFORMANCE
OR RESULTS YOU MAY OBTAIN BY USING THIS SOFWTARE OR SUCH FILES.
THE PERSON USING THE SOFTWARE BEARS ALL RISKS AS TO THE QUALITY AND
PERFORMANCE OF THE SOFTWARE, OR ANY ISSUE OR DAMAGE OCCURRED WHILE
RUNNING IT.
